DO-254, Design Assurance Guidance for Airborne Electronic Hardware is a standard for complex electronic hardware development published by RTCA, Incorporated.
Outline of contents
The DO-254 standard was formally recognized by the FAA in 2005 via AC 20-152 as a means of compliance for the design of complex electronic hardware in airborne systems. Complex electronic hardware includes devices like Field Programmable Gate Arrays (FPGAs), Programmable Logic Devices (PLDs), and Application Specific Integrated Circuits (ASICs). The DO-254 standard is the counterpart to the well-established software standard RTCA DO-178B/EUROCAE ED-12B. With DO-254, the FAA has indicated that avionics equipment contains both hardware and software, and each is critical to safe operation of aircraft. There are five levels of compliance, A-E, which depend on the effect a failure of the hardware will have on the operation of the aircraft. Level A is the most stringent, defined as "catastrophic", while a failure of Level E hardware will not affect the safety of the aircraft. Meeting Level A compliance for complex electronic hardware requires a much higher level of validation and verification than Level E compliance.
2. System Aspects of Hardware Design Assurance
The main regulations which must be followed are requirements capturing and tracking throughout the design and verification process. The following items of substantiation are required to be provided to the FAA, or the Designated Engineering Representative (DER) representing the FAA: Plan for Hardware Aspects of Certification (PHAC), Hardware Verification Plan (HVP), Top-Level Drawing, and Hardware Accomplishment Summary (HAS)
3. Hardware Design Life Cycle
The hardware design and hardware verification need to be done independently. The hardware designer works to ensure the design of the hardware will meet the defined requirements. Meanwhile, the verification engineer will generate a verification plan which will allow for testing the hardware to verify that it meets all of its derived requirements.
4. Planning Process
5. Hardware Design Processes
The validation process provides assurance that the hardware item derived requirements are correct and complete with respect to system requirements allocated to the hardware item.
The verification process provides assurance that the hardware item implementation meets all of the hardware requirements, including derived requirements.
7. Configuration Management Process
8. Process Assurance
9. Certification Liaison Process
10. Hardware Design Life Cycle Data
11. Additional Considerations
- Section 1.6 (Complexity Considerations) presents the definition for Simple Device.
- Table 5-1 (Typical ASIC/PLD Process Mapping) presents a process mapping very useful for practical application considering the scope of AC 20-152
Certification in Europe
Published - July 2009
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